1. Field of the Invention
The present invention relates to a method for producing a semiconductor device by growing a device layer on a semiconductor substrate, forming a predetermined device in the device layer, and separating the device layer from the semiconductor substrate.
2. Description of the Related Art
Hitherto, the following devices including compound semiconductor materials and methods for producing the devices have been employed.
High-In-Content Device
Hetero-junction bipolar transistors (HBTs) each including InGaAs lattice-matched grown on an InP substrate and high-electron-mobility transistors (HEMTs) each including InGaAs/InAlAs have a balance between high-speed capability and high electric field strength. Development of HBTs and HEMTs as key devices for large-capacity communication systems has been promoted. However, InP substrates are expensive. This is a factor in limiting InP devices being applied to consumer appliances.
For the purpose of providing high-In-content devices at low cost, metamorphic growth including growing a high-In-content device layer on a buffer layer provided on a GaAs substrate or a Si substrate that is inexpensive compared with an InP substrate has been developed. HEMTs each including metamorphic InGaAs/InAlAs on a GaAs substrate are close to practical use. However, metamorphic HBTs are still not in practical use.
Epitaxial Lift-Off Method
As another method for providing a compound semiconductor device at low cost, there is epitaxial lift-off (ELO). It is desirable to reuse a substrate by ELO. Studies on methods for producing III/V Group semiconductor devices by employing ELO have been conducted. ELO includes forming a sacrificial layer between a device layer and a substrate; immersing the substrate in an appropriate solution after the completion of a production process of a device or before a production process of a device is initiated; and dissolving the sacrificial layer to separate the device layer from the substrate. The separated semiconductor substrate can be reused.
Points of ELO are etching of the sacrificial layer, i.e., to obtain a high etch rate of the sacrificial layer in a lateral direction, and the handling of the ultra-thin device layer, i.e., to transfer the ultra-thin device layer subjected to lift-off onto another substrate without damage to the ultra-thin device layer.
In ELO, the sacrificial layer is dissolved by lateral etching, thus requiring a corresponding time to complete lift-off. An increase in the diameter of the substrate requires a longer time to complete lift-off. For example, it takes several tens of hours to several days for the detachment of a substrate having a diameter of two inches in response to the diameter of a substrate, the material of the sacrificial layer, a thickness, etching conditions, and the like.
An attempt is made to increase the lateral-etching rate (J. J. Schermer et al. “Epitaxial Lift-OFF for large area thin film III/V devices”, Phys. Stat. sol. 202, No. 4. (2005), 501-508 (Non-Patent Document 1)). In this case, a flexible supporting substrate is bonded to a device layer and is curled up to open an inlet for an etching solution, thereby significantly increasing the etching rate. As described in Non-Patent Document 1, however, bending the device layer may cause damage to the device layer.
The handling of an ultra-thin device layer having a thickness of several micrometers to several tens of micrometers is reported (T. Morf et al. “RF and 1/F noise investigations on MESFETs and circuit transplanted by Epitaxial Lift OFF”. Electron Device 43(1996)1489-1494 (Non-Patent Document 2)). Non-Patent Document 2 describes a simple method utilizing wax as a support. After lift-off, there is provided a method including mounting the device layer on a supporting substrate, such as glass or Si, having a clean surface; and applying an appropriate load to the device layer from the above to bond the device layer to the supporting substrate by intermolecular force (Van der Waals bonding; e.g., see E. Yablonovltch et al. “Van der Waals bonding of GaAs epitaxial liftoff films onto arbitrary substrates”, Appl. Phys. Lett. 56(1990)2419-2421 (Non-Patent Document 3)). In this method, disadvantageously, it is difficult to perform a backside process. That is, by appropriately performing the backside process, element characteristics can be improved. However, when wax is used as a support and when the backside process is performed, a plurality of steps of transferring the device layer to substrates are required, thus increasing the risk of damage to the ultra-thin device layer.
Reduction in Thickness of Device Layer
Reducing the thickness of a device layer (semiconductor chip) is a common process performed for the purpose of improving the heat-releasing properties of a chip. In general, after device processing, the backside of a substrate is polished to reduce the thickness to about 100 μm. A metal thin film is formed on the backside. The device layer is subjected to dicing. The resulting chip is mounted on an IC case. In recent years, further progress has been made in a reduction in thickness. A polishing technique in which a device layer is polished so as to have a thickness of about 50 μm and a technique for handling an ultra-thin chip have been developed. Hitherto, the thickness of a chip is reduced by backside polishing. A substrate disappears by polishing. Thus, it is difficult to reuse. The thickness of a device layer obtained by ELO is at most about 10 μm; hence, an ultra-thin chip that may not be obtained by the known polishing technique is obtained.
Backside Process
Performing a backside process after reducing the thickness of a device layer improves characteristics of a HBT including InGaAs/InP (see M. J. W. Rodwell et al. “Submicron Scaling of HBTS”, IEEE Electron Devices 48(2001)2606-2624 (Non-Patent Document 4) and Q. Lee et al. “Submicron transferred-substrate heterojunction bipolar transistors”, IEEE Electron Device Lett. 20(1999)396-399 (Non-Patent Document 5)). That is, a substrate surface subjected to device processing is bonded to a supporting substrate. An InP substrate is subjected to backside polishing and wet etching. Then collector electrode is formed on the backside. This method is referred to as a “transferred substrate”. Thereby, the capacitance between a base and a collector is reduced to obtain a high fmax. In this way, if a lithography process is performed on a backside after reducing the thickness of a device layer, the high-speed capability of a HBT may be improved.